1. Field of the Invention
Example embodiments of the present invention relate generally to a programmable processor and methods thereof, and more particularly to a programmable processor and methods of transferring data within the programmable processor.
2. Description of the Related Art
A system-on-chip (SOC) may include a hardware element as well as software configured to control the hardware element. SOCs may include a development process where SOC hardware and software are developed in parallel (e.g., separately). Software updates may be used to patch software which may not run perfectly when sold to consumers (e.g., because the parallel development may not allow complete testing before entering the market). In the SOC, a Joint Test Action Group (JTAG) or device firmware upgrade (DFU) of a universal serial bus (USB) may be examples of modules which may facilitate program update processes.
If a user updates a software program in an SOC, there may be a possibility that the security of the SOC may be compromised (e.g., illegal or inappropriate software may be downloaded and/or uploaded due to hacking). Accordingly, a conventional programmable processor of the SOC may include an encoding block and a decoding block in order to reduce a likelihood of success for a security attack of the software program during an update.
FIG. 1 is a block diagram of a conventional programmable processor 10. Referring to FIG. 1, the conventional programmable processor 10 may include a memory 12, an encoding block 14 and a decoding block 16. The encoding block 14 may encode received data IDTA according to an encoding key and may store the encoded data ENDTA in the memory 12. The decoding block 16 may decode the encoded data ENDTA input thereto according to a decoding key and may output decoded data DEDTA.
The conventional programmable processor 10 may require several clock pulses or cycles of a clock signal to perform the above-described encoding and decoding operations. Accordingly, the decoding/encoding of data transferred to/from the memory 12 may reduce system performance. Furthermore, a layout area of a processor chip may be relatively large because the encoding block and decoding block may be included within the processor chip. Further, the encoded data may be decoded in order to allow the programmable processor to process the decoded data, thereby increasing a security risk.